FPGA-Based Real-Time Implementation of AES Algorithm for Video Encryption
نویسندگان
چکیده
Multimedia data security is becoming an important concern due to the fact that multimedia applications affect many aspects of our life. To deal with the increasing use of multimedia in industrial process, security technologies are being developed. Multimedia encryption algorithms implemented in hardware have emerged as the most viable solution for improving the performance of Multimedia encryption systems. The introduction of reconfigurable devices and high level hardware programming languages has further accelerated the design of encryption technology in FPGA. In this paper, we report on the implementation and hardware platform of a real time video encryption processing. The processing encrypts videos in real time using the AES algorithm. We propose a computationally efficient architecture for AES. The system is optimized in terms of execution speed and hardware utilization. The design as know AES encryption processor is developed in Xilinx System Generator and integrated as a dedicated hardware peripheral to the Microblaze 32 bit soft RISC processor with the EDK embedded system and implemented targeting a Spartan3A DSP 3400 device (XC3SD3400A-4FGG676C). The video encryption processing has been verified successfully. The input comes from a live video acquired from a CMOS camera and the encrypted video is displayed on a DVI display screen. Key-Words: Multimedia, Encryption, Real Time, AES, Field Programmable Gate Array, Xilinx System Generator (XSG), Microblaze Processor, Embedded Development Kit (EDK).
منابع مشابه
FPGA Can be Implemented Using Advanced Encryption Standard Algorithm
This paper mainly focused on implementation of AES encryption and decryption standard AES-128. All the transformations of both Encryption and Decryption are simulated using an iterativedesign approach in order to minimize the hardware consumption. This method can make it avery low-complex architecture, especially in saving the hardware resource in implementing theAES InverseSub Bytes module and...
متن کاملDifferential Power Analysis: A Serious Threat to FPGA Security
Differential Power Analysis (DPA) implies measuring the supply current of a cipher-circuit in an attempt to uncover part of a cipher key. Cryptographic security gets compromised if the current waveforms obtained correlate with those from a hypothetical power model of the circuit. As FPGAs are becoming integral parts of embedded systems and increasingly popular for cryptographic applications and...
متن کاملHardware Implementation of AES Encryption and Decryption System Based on FPGA
AES algorithm has played an important role in information security field for a long time since Rijndael algorithm was announced as advanced encryption standard. Hardware implementation based on FPGA of AES algorithm has the advantages of fast, flexible, short development cycle, etc. Hardware implementation based on FPGA of AES encryption and decryption system was studied in detail in this paper...
متن کاملHardware Implementation Based on FPGA of AES Encryption and Decryption System
It is not hard to predict that AES algorithm will play an important role in information security field for a long time in the future after Rijndael algorithm was announced as advanced encryption standard. Hardware implementation based on FPGA of AES algorithm has the advantages of fast, flexible, short development cycle, etc. Hardware implementation based on FPGA of AES encryption and decryptio...
متن کاملDesign and implementation of real time AES-128 on real time operating system for multiple FPGA communication
Security is the most important part in data communication system, where more randomization in secret keys increases the security as well as complexity of the cryptography algorithms. As a result in recent dates these algorithms are compensating with enormous memory spaces and large execution time on hardware platform. Field programmable gate arrays (FPGAs), provide one of the major alternative ...
متن کامل